ESSERC 2024 Workshop

Bio: Bogdan Govoreanu is currently a Principal Member of Technical Staff with imec. He has strong interests in Emerging Device and Compute Technologies and has been working on various topics including 2D Materials, Quantum Computing,Neuromorphics, and several Emerging Memory technologies. His research has been concluded in over 250 publishedresearch articles and several patents. He served as a technical program committee member (IEDM, ESSDERC),subcommittee chair (ESSDERC, 2015-2018), and ESSDERC Tutorials Chair (2017). In 2016-2017, he co-organized the jointimec-Stanford Workshop on Resistive Switching Memory. Dr.Govoreanu holds a Ph.D. degree in Applied Sciences from KU Leuven (2004). He is an IEEE Senior Member and serves as an Editor for the IEEE Electron Device Letters journal.

Abstract: 2D materials have triggered enormous interest over the past 15 years, thanks to their interesting electronic and optical properties, whichhave propelled them as viable candidates for replacing/complementing the good-old Silicon in future semiconductor technology nodes. Nevertheless, several tough challenges need to be addressed to take the opportunities ahead. ​

In this workshop, we will give an account of a few relevant R&D areas, outlining key attention points in material growth, integration, and reliability, and we will sample applications domain opportunities, underlining the unique advantages of the 2D materials, which recommend them as prime contenders for continuing the physical/functional scaling, as well as for expanding into the applications space, for the years/decades to come.

Bio: After completing her studies and a post-doctoral fellowship at the department of chemistry at the university of Leuven (Belgium), Inge Asselberghs joined imec in 2011, specialising in 2D-materials processing, device fabrication, and characterisation. Her research interest covers new materials, process set-up, and integration pathfinding from the laboratory scale to fab infrastructure. After holding a position of program manager beyond-CMOS, exploratory logic, and process and module innovation, she currently moved to the position of senior manager funded projects at imec combined with the role of2D-EPL director.

Abstract: The 2D-Experimental Pilot Line (2D-EPL) project is part of the larger Graphene Flagship activity and has now finished its final year. The projects’ ambitious goal is to start building a European ecosystem for the fabrication of 2D materials-based devices applicable in sensor, photonic and electronic applications. In the fist project pillar all activities are handled to establish dedicated equipment and processes for 2D materials integration which are applicable to graphene and transition metal dichalcogenides. In the parallel pillar, prototyping services are offered by multi project wafer (MPW) runs to pilot line customers. During this presentation, we will report on our findings established within the project consortium.

Bio: Prof. Tibor Grasser is an IEEE Fellow and head of the Institute for Microelectronics at TU Wien.  He has edited various books, e.g. on the bias temperature instability, hot carrier degradation, and low-frequency noise (all with Springer), is a distinguished lecturer of the IEEE EDS, has been involved in outstanding conferences such as IEDM (General Chair 2021), IRPS, SISPAD (General Chair 2007), ESSERC (TPC Co-Chair 2015), and IIRW (General Chair 2014), is a recipient of the Best and Outstanding Paper Awards at IRPS (2008, 2010, 2012, 2014, and 2023), IPFA (2013 and 2014), ESREF (2008) and the IEEE EDS Paul Rappaport Award (2011).  He has been an Associate Editor for IEEE T-ED and Microelectronics Reliability (Elsevier).

Abstract: Despite the breathtaking progress already achieved for 2D electronic devices, they are still far from exploiting their predicted performance potential. This is in part due to the lack of scalable insulators as their selection, fabrication, and characterisation represent an enormous challenge. In order to achieve competitive device performance, these insulators need to meet stringent requirements regarding (i) low gate leakage currents, (ii) low density of interface traps, (iii) low density of border insulator traps and (iv) high dielectric strength.  This talk will address the current state of the art and summarise the main problems together with potential solutions.

Bio: Chelsey Dorow is a research engineer in Components Research at Intel and is currently based out of IMEC in Leuven, Belgium. Her work is focused on novel device technologies to enable the continuation of Moore’s Law scaling. She received a PhD in physics from the University of California, San Diego.  

Abstract: 2D materials show potential for the replacement of Si channels for transistors of highly scaled gate length below 10nm and may therefore provide an opportunity to continue Moore’s Law scaling beyond Si. We discuss the manufacturability of 2D materials and identify the key process developments required to enable 2D CMOS as a viable technology. Integration options for 2D stacked nanosheet transistors are proposed along with a benchmark of today’s 2D transistor performance with respect to Si.

Bio: Mario Lanza is an Associate Professor of Materials Science and Engineering at the National University of Singapore. His research focuses on improving electronic devices, integrated circuits and silicon microchips using novel nanomaterials. He has published over 200 research articles in top journals including Nature, Science and Nature Electronics, and he has been plenary, keynote, tutorial and invited speaker in over 150 conferences. For this work, he and his students have received some of the most prestigious recognitions and awards in the world (such as the IEEE Fellow), and his articles have been highly cited. He is often consulted by leading semiconductor companies and top publishers. He is an active member of the board of governors of the IEEE - Electron Devices Society, and has been involved in the technical and management committee of top conferences in the field of micro/nano electronics, including IEDM and IRPS.

Abstract: Two-dimensional (2D) semiconducting materials (MoS₂, WS₂) are being proposed as replacement of silicon as channel in field effect transistors. It is believed that 2D semiconductors could provide high carriers’ mobility in ultra-scaled nodes, better electrostatic control over the on/off switching process, enhanced sub-threshold swing, reduced short-channel effect, and low power consumption. However, the local defects in the 2D semiconducting channel, either produced during the synthesis (native) or introduced during post processing (transfer, deposition of other materials), degrade the performance of the transistor, increase device-to-device variability, reduce yield, and can lead to multiple reliability issues and premature failure. Instead, memristors are electronic devices much more resilient to native defects, and top electronic performance has been achieved in 2D materials-based memristors, even when integrated on silicon microchips. In this talk I will review the status of 2D-materials-based memristor. I will also discuss the main technological challenges to face in the next years and provide some recommendations on how to solve them.

Bio: Stephan Suckow obtained his B.Sc. and M.Sc. in Physics of Semiconductor Technology from the BTU Cottbus, Germany, and his PhD in Physics from RWTH Aachen University in 2012 on the simulation of photonic silicon nanostructures. He joined AMO GmbH in 2015, became the vice head of the Nanophotonics group in 2018 and is leading the group since 2022. He coordinated the H2020 project POSEIDON, is the technical manager of the H2020Project GRACED and coordinates the work at AMO for several other national and European funded projects.

Abstract: This talk will cover an overview and perspectives of different opto-electronic devices, namely photodetectors, modulators and heaters. The focus will be on graphene, but other materials like transition metal dichalcogenides will be covered as well.

Bio: Benjamin Groven acts as a Research and Development Engineer at IMEC since Winter 2018. In that role, he tries to capture insight in nucleation and growth mechanisms of atomically controlled deposition processes for two-dimensional materials, and their implementation in future nanoelectronic technologies. He obtained a MSc in Applied Physics in 2014 from University of Technology Eindhoven (NL), and his PhD from University of Leuven (KU Leuven, BE) in 2018. Further, he was a visiting researcher at the University of California Riverside (USA). 

Abstract: Future manufacturable deposition approaches for semiconductors need to provide solutions to mitigate defective grain boundaries in semiconductors. Grain boundaries limit the fabrication of highly performing semiconductor devices withtwo-dimensional semiconductors for industry’sAangstrom technology nodes. Therefore, in this presentation, we review two deposition approaches to reduce crystal grain boundaries in two-dimensional semiconductors molybdenum andtungsten disulfide (MoS2, WS2) during chemical vapor deposition (CVD). We explore how the number of crystal grainboundaries can be modulated through substrate design and CVD precursor chemistry, enabling further integration in a300 mm industrial pilot line.