Chips and bits with integrated graphene
Traditional silicon electronics have almost reached their maximum potential. Moore’s Law predicts the number of transistors in an integrated circuit doubles every year, however cost and power consumption keep growing and physical limitations hinder the development of faster and denser devices. Graphene and layered materials opened a new space in electronics, paving the way to a more-than-Moore scenario of disruptive technologies for digital applications. The Electronic Devices Work Package focuses on these advances.
This year’s progress
Our aim is to develop new fabrication processes to exploit the properties of graphene and layered materials in electronic applications. In particular, we explore logic circuits, wireless communications and flexible electronics, all in close collaboration with other Graphene Flagship work packages. To achieve this, we combine the excellent conductive properties of graphene with other layered materials such as transition metal dichalcogenides and hexagonal boron nitride acting as semiconductors and insulators, respectively. The different layers enable the creation of heterostructures with hybrid properties and use in devices with unprecedented features and new applications in electronics.
Thanks to the versatility of layered materials, we demonstrated how to print traditional CMOS devices onto flexible substrates like paper. The Graphene Flagship is fully committed to developing more sustainable solutions, and graphene-enabled inkjet-printed circuitry can fulfil the need for environmentally friendly electronics. A step forward in sustainable transistors was possible, thanks to our technology that enables printing all the main building blocks of electronics, such as inverters, logic gates and latches; all highly recyclable and produced at very low costs.
Other advances include high data-rate communication links, new Hall sensors for position sensing, and electronic devices for biomedical applications. All these make the most of the electronic properties of graphene and layered materials. Furthermore, the Electronic Devices Work Package also investigates the underlying physics of these phenomena, to better understand the potential of layered materials in real-world applications.
Moving forward, our work package will focus on improving the manufacturing process of graphene-enabled electronics. We will address issues related to reliability, stability and reproducibility, making
sure that our technologies are ready for European manufacturing lines. Complex systems featuring graphene and layered materials may become standard in future electronics.
Sometimes, transistors based on transition metal dichalcogenides present unwanted hysteresis, a physical effect detrimental to their performance. We solved this issue, mostly thanks to the complementary skills and competencies within our work package and the cooperative environment within the Graphene Flagship. Our main challenges are related to increasing the reliability of graphene-enabled electronic devices, reducing performance variations and boosting the stability under stress. We will hopefully solve these and hit the market, demonstrating the competitiveness of graphene and layered materials for electronics
MoS2-enabled logic-in-memory devices with the potential to outperform silicon
Graphene Flagship researchers at the Catalan Institute of Nanoscience and Nanotechnology (ICN2), Barcelona, have led the publication of Nature review that roadmaps the possibilities of 2D materials in spin-based memory technologies.
Graphene Flagship researchers from ICFO in Barcelona, in collaboration with teams in Columbia University, US, NTU, Singapore and NIMS, Japan, have reported the first use of light to bend of electrons in bilayer graphene.
Graphene Flagship researchers produced graphene fragments with a diameter smaller than 100 nm – and showed their potential for photodetection.
Ultra-small devices show nano-synaptic responses with low power consumption.