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Wafer-Scale System Integration

Work Package 10

Incorporating graphene into microelectronic components, like memory chips and processors, or photonic components for data communications, can enhance their performance in terms of size, power, energy efficiency and more. This is crucial for the next generation of photonic, optoelectronic and highfrequency electronic devices.

But integrating graphene and layered materials into scaled-up manufacturing processes is a challenge, and this is necessary for graphene-integrated circuitry to be fabricated on an industrial scale. This can be done using wafer-scale system integration: the process of building large integrated circuits, on an entire silicon wafer, from the bottom up.

In our Work Package, we tackle this challenge head-on. We focus on the development of innovative solutions for wafer-scale integration with graphene, for a wide range of electronics, optoelectronic and photonic applications.

From lab to lab

The wafer-scale integration of graphene into electronic and photonic devices requires us to develop a transition from the laboratory to the fabrication line. Our research has demonstrated that graphene can be integrated into the silicon fabrication processes, and by doing this, we can transfer the properties of graphene into wafer-scale production.

The scope of our Work Package is to find new scientific and technological solutions to make graphene compatible with existing wafer-scale fabrication processes, especially those producing integrated circuit chips. We are working on methods for growth and transfer of graphene onto a large wafer, up to 300 mm in size, and developing the technology to integrate it while preserving its quality, integrity and high carrier mobility.

Work Package Leadership

Leader: Marco Romagnoli, CNIT, Italy
Deputy: Amaia Zurutuza, Graphenea Semiconductor, Spain

Division Leadership

Leader: Marco Romagnoli, CNIT, Italy
Deputy: Maria Smolander, VTT Technical Research Centre of Finland Ltd

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